I use SN74CBTD3384 on a board I produce. I prefer the TSSOP (PW)
package, but that will depend on how you wish to layout the board.
There is a smaller package, the TVSOP (DGV) and some larger. No DIPs
If you want to get a board made, you need to use a layout package. I
don't know of any PCB fab houses that will work with custom art. It has
to be a layout package format or Gerber files.
Understood. The idea of the image format would be to present to you my
initial work, so you could scrutinize it and give me notes. I would
adjust it, and then once it's in final form, translate it to a layout
I have long-term goals to write a software program called Logician, which
is a logic layout tool which will include routing abilities. So, this
would be an early implementation of that algorithm so the bitlines are
not trumped by their neighbors. :-)
I envision a 4- or 6-layer board with vias.
Rick C. Hodgin
To start, I suggest you take a look at FreePCB. It has an easy
learning curve and support in a Yahoo group. Stick to a 4 layer board
for cost. I can't see any reason why this would not be easy. Pick an
FPGA in a non-BGA package if you can. I don't recall how many I/O you
need, but there are 144 pin QFPs (~110 I/Os) and I think some 208 pin
QFPs around. Even if you go with an older FPGA like a Spartan 3A the
wider pitch package is worth it. If you have to use a BGA, pick one
with a wide ball spacing like 1.0 mm.
FreePCB looks good. How much should a board like this cost?
I had planned on using my Altera Cyclone V GX dev board with this FPGA:
I have an adapter coming which leverages the HSMC port to GPIO ports:
I'm going to begin working on my Logician tool off-and-on this year.
It will allow me to program logic gates and handle translation to a
physical process, along with wire routing. It will include a full
simulator, and an export-to-Verilog module, which I will use for the
general purpose logic.
Rick C. Hodgin
I didn't really mean quirks as in things that didn't work, or work right. I
just meant that each tool chain has a lot of features to learn, where the
optional settings are hidden, how to quickly configure the simulator, how to
set up to generate configuration PROM images, etc. There is a lot to learn
before you get fully productive.
Also, the 74LVC8T245 is a good bidirectional translator, 8 bits in a 24-pin
package. Or, the 74ALVC164245DL, two independent 8-bit translators in a 48-
pin package. I've used a bunch of both of these in some gear I have
produced, mostly to connect between FPGAs with 3.3 V I/O and 5V systems.
I also used the former to connect 5 V systems to the old Beagle Board
computer, which had 1.8 V I/O.
I'll get the pinouts
Complex designs like this require GOOD schematic and PCB layout tools. I
use an old one, Protel 99SE, but that is no longer available, and was pretty
expensive when it was. I have used Kicad a little, it shows REAL promise,
but is not yet as good as Protel. It runs on Windows AND Linux! And, it is
free, open-source software. The advantage of these packages is you can do
copper pours, inner power plane layers, and it checks the correctness of the
PCB layout against the schematic. No human could EVER be sure that a
complex PCB layout was correct, no matter how long they looked at it.
Software DRC takes just a couple seconds.
You can do that. But if you are using QFPs, a soldering iron works
pretty well I am told. The solder stencil is not so easy to use but
works ok. If you have BGAs or land grid array parts you have to use the
Yes. For the designs I do, the compile only takes a few seconds, and the
sim runs pretty fast, although not blazingly. Sometimes I need to run 10's
of ms of simulated time to get out to the interesting part, and it takes a
minute or so. I can't imagine how some of the people simulating gigantic
But, the GUI aspects of Xilinx' sim is SO much better than that ghastly
Modelsim product which I never really got competent at running.
I don't do this for one-offs or prototypes. There is a big trick to the
stencils. You need to reduce the area of the stencil apertures, or the
excessive solder paste clumps together and bridges between the leads. As
the lead pitch gets finer, this gets more and more critical.
Another trick is to place solder blobs on two diagonal pads, and tack the
chip down. You can view the alignment on all 4 sides and "walk" the chip by
melting the solder on one of the tacked-down pins at a time until alignment
is good. Then, apply liquid flux down all the rows of pins, and drag a
soldering iron down the rows. The solder plate on the board is usually
enough to solder the pins.
Can you be more specific? I got used to Modelsim and then paid for a
package from Lattice when I got some work using their part. Between the
time I ordered the package with Modelsim and the time it was shipped to
me, they switched to using the Aldec product. I raised hell with them
over the phone and email, but they insisted there was nothing they could
do. So I got over it and found the Aldec simulator didn't crash
periodically like the Modelsim product did. Otherwise it used a
compatible scripting interpreter and overall worked very similarly. It
has been a while since I've done much with it, but I don't recall
anything that is too awkward. What is so bad that you find Modelsim to
I have yet to deal with hand soldering of anything this fine, but I'm
told you can put a blob of solder on the iron tip to do the swipe you
are referring to. *Very* little solder is needed to make a good
connection. Many follow up the solder swipe by a solder braid and iron
to remove the excess which may not be easy to see between or behind the
pins. Someone who was hand soldering one of my boards told me he had a
fit trying to remove a short once because it was so fine he couldn't see
it even *with* a magnifier. Eventually he just passed a sharp point
between all the leads on the connector and the short was gone. I guess
it was virtually like a tin whisker (but before RoHS).
Yesterday I remembered an additional thing that can go wrong, and almost
certainly will go wrong.
The system you are hacking (the motherboard) almost certainly uses DRAM
as its main memory. DRAM needs to be refreshed every so often. This is
done by the memory controller toggling a particular command to the chip
when it wants the chip to refresh the memory. The question is how does
the memory controller know when to order a refresh. Almost 100%
certainly, it has a counter that responds to the clock signal driven by
or derived from the main system clock. The system clock you underclock.
So if you slow the clock enough, you are certain to violate the refresh
timing of the DRAM and ruin its contents.
And you can't have a computer without a functional main memory. :)
I'm in. :)
Although, for the time being, I'm fine with using FPGAs.
I've been thinking about building a completely open-source computer, down
to the atoms, but it's really a group project. There's literally no point
in building a computer that will not be used outside of a single family
or "close knit community". A bunch of villages and a city would be the
smallest user base I would target.
Yet, so far, I seem to be the only person I ever met off the Internet to
have such interests.
Ouch, ouch, ouch, too much - unless you're good at it. :)
I designed and implemented a 16-bit soft CPU from scratch, and I can tell
you it's seriously difficult to make it work. Right now, I'm hacking a 32-
bit CPU (aeMB, to be very specific) and interfacing it to a SoC I plan to
publish eventually and again, it's seriously difficult to make it work.
If you add a bit to the word or address size, you are not just doubling
the CPUs capabilities, you are also doubling the number, size and scope
of problems you have to deal with.
Now, if you already did work on this, or have a working Verilog/VHDL
model, it's probably OK - taking into account your time horizon. But if
you are at the stage of an idea, I would suggest making up your mind
between x86 and ARM and just focusing on one untill you make it work.
Oh. OK. :) Works for me.
Did you publish any of your work?
Verily, I shall review this. I'm starting to get the impression that all
the stuff I'm making on my own has already been solved, but hasn't been
advertised. I'm working on my dream computer, but these solved systems
constantly keep popping up. Maybe all of it has already been solved?
At any rate, this implementation is an absolute MONSTER, clocking in at
36k gates (and providing a passe 30 MHz of x86). Just how the fuck am I
supposed to fit that in a sane chip? You know, the ones for which you can
get synthesizers for free, instead of paying several thousand dollars for
But the HDD or VGA *might* be salvageable, depending on the
There is a 14.31 MHz clock on the main board that is used to time
various activity including the refresh. I believe this was divided by 3
to get the original CPU clock rate (8088) and further divided to get the
clock to the 8253 timer chip which controlled the refresh as well as the
speaker logic and generated the time of day clock. The clock rate to
the CPU changed as PCs ran faster, but the clock to the timer chip
remained. The 14.31 MHz clock was used on the backplane connectors to
be used by the video cards when needed.
Refresh needs to be done on DRAM, but if you aren't using DRAM, then you
don't need refresh.
I expect trying to get anything remotely like a critical mass is
virtually impossible. There is an open source chip similar in size and
capability to the ARM processors called RISC-V that is getting wide
attention and will produce a chip soon.
It will never be possible to include an ARM ISA unless a license fee is
paid. I recall some years back a student produced an HDL version of an
ARM 7TDMI. ARM spoke to him and the core was withdrawn. He also got a
job with them. Win/win
I'm surprised that you say it is hard to make it work. Do you mean it
is hard to build all the infrastructure? I have designed my own CPUs
before and found that part easy. It is creating the software support
that is hard, or at least a lot of work. I use Forth which helps make
??? My CPU design did not specify the data size, only the instruction
size. I didn't have a problem adjusting the data size to suit my
Exactly what is your dream computer?
Never underestimate the power of a project given over to God. :-) He can
guide people down paths that don't seem to make sense, but because He can
see what's coming in the future, has them right where they need to be when
that time comes.
FWIW, I've been considering photonic circuits lately. I've devised an
entire methodology for how they would operate in theory. They cannot yet
be built (to my knowledge), but the circuits I'm creating perform the
necessary logic ops, and do more than existing circuits because they
general almost no heat.
It's been a nice mental exercise actually, and it's helped me think about
those things in the low-level "building sand castles" arena, as though I
am a builder on the silicon, creating things up from there.
It's why all patents and copyrights should be abolished, and the fruit of
man's ideas should be given to mankind, with the people then only being
paid for their labor, as the ideas and ingenuity they possess are gifts
from God, given not just for them to use to their profit, but as part of
that fabric of man God put here upon this world.
We should not oppress people, but work with them and encourage those who
have special and unique abilities, letting them thrive.
Rick C. Hodgin