FPGA motherboard for 80386 CPU

The 80386DX CPU had 132 pins:
80386DX and 80386SX pinouts:
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General architecture:
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Of these pins on the DX variant:
32 pins -- data
30 pins -- address
4 pins -- byte enables in 32-bit writes
1 pin -- Read/write
1 pin -- Data/Control
1 pin -- Memory/IO
1 pin -- Bus mastering lock issued by CPU
1 pin -- Bus16 size (16-bit when asserted, normally 32-bit)
1 pin -- Next address (for pipelining)
1 pin -- Address valid signal
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73 pins -- For basic I/O
3 pins -- Math-coprocessor support
1 pin -- Ready (or Wait, for bus cycles to complete)
2 pins -- Hold and Hold Acknowledge (for bus mastering)
2 pins -- Interrupt and Non-masktable Interrupt
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8 pins -- General coordination with external peripherals
1 pin -- Reset
1 pin -- Double-pumped clock
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2 pins -- System input
The rest of the pins are unused, go to VSS or VCC. This means that for a
full 80386 "motherboard" only 83 pins are required to fully support its
operation, 67 of which are address, data, and data type, leaving really
only 15 pins of complex operation for a state machine.
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Would anybody be able to help me create this 80386 motherboard using an
AMD Am386 CPU, which is a static CPU operating from 0 to 40 MHz? I would
like to get it working with a single-step operation for design validation,
and then to begin ramping it up.
I figure I'll have an area of ROM which the CPU boots to load, which is a
tiny real mode program, which begins computing something that can be exam-
ined by the FPGA to test successful operation. And then move on to more
complex operations, including a custom microkernel.
--
Rick C. Hodgin
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Rick C. Hodgin
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Rick C. Hodgin wrote on 11/10/2017 10:35 AM:
I'm sure many here would be *able* to help you. The question you should be asking is who would be *willing* to help you...
What parts are you having trouble with? Why do you need help exactly?
--
Rick C 

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rickman
The 80386DX was a 5V part. My FPGA supports 3.3V, so I need some kind of level shifter? I'll need to build a breakout board to route through my existing 40-pin FPGA breakout ports (160 pins). So, do I go with an online custom manufacturer? Buy materials and pattern and etch my own board, soldering everything myself? Are there generic sockets the Am386 would fit in which are already broken out?
I need help with the mechanics of Verilog. I know how I want things to route, but the mechanics of the language confuse me. I don't understand why at times I need registers, and other times I can route wires. The assignments are confusing me, when to use
Reply to
Rick C. Hodgin
I don't follow what you are saying here. What is a 40 pin breakout port? Are you talking about connectors on an FPGA board? I don't understand your goals, so I can't help you figure out what you need to do. Are you trying to make a board that will plug into the existing socket on a 386 motherboard?
I'm not a Verilog guy so I can't help you with that. I'm more of a VHDL guy.
What's wrong with keeping your feet on the ground?
We've had this conversation before. Every project starts with goals (user requirements in a formal analysis) which need to be translated to design requirements and finally detailed as an implementation. You tend to mix those various levels without understanding you are doing that.
What are your goals exactly?
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Rick C 

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Reply to
rickman
then you should probably start with a basic verilog project with some blinking leds and not a giant hairball of a CISC cpu...
Reply to
lasselangwadtchristensen
I've done that. I've made the KITT car red light thing. I've responded to buttons. I've debounced inputs. An on Arduino, which is basically C code, I've made tone generators, sent output on a clock to a remote device on 18 pins, etc.
I know what I'm doing conceptually. I need help in the mechanics in Verilog, and on some practical decisions.
BTW, your reply made me LOL when I got to the "hairball" part. :-)
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Rick C. Hodgin
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Rick C. Hodgin
The FPGA uses a high density 160-pin connection. You can buy an add-on board which takes the high-density connection and breaks it out to 4x 40-pin connectors (like IDE cables).
I'm trying to create a board an Am386 CPU will plug in to, which then makes my FPGA its motherboard. I will be the north bridge (memory and high speed I/O like graphics) and south bridge (low speed I/O like keyboard, mouse, timer, etc).
I know what I want. I tend to work in my head more than in formal writings.
(1) Get the board designed physically, and ordered or built. (2) Assemble the board. (3) Write the Verilog code to feed and respond to the CPU's needs. (4) Write basic software to test and debug the design. (5) Write real hardware for video, sound, network, keyboard, mouse, etc., to create a little 80386-based system.
Thank you, Rick C. Hodgin
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Rick C. Hodgin
If you want to work with people, they can't see what's in your head. You need to write stuff down to get help.
You need to define the board a lot better.
That will require the FPGA either allow the CPU access to a memory device or some other way serve up data from RAM and/or ROM. Do you know what you want for that?
What other types of I/O do you intend to provide? Are you familiar with the entire interface of the 386 CPU? You will need to know every detail. To design the equivalent of a motherboard you would do well to find a 386 PC/AT technical reference manual or other schematic for a motherboard. They used TTL logic and you can easily implement that in the FPGA.
So you want a full computer in an FPGA other than the 386 CPU? You will also need a BIOS which is not open source... unless someone has an open source BIOS... I don't recall hearing of one.
So where are the parts you need help with?
--
Rick C 

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rickman
As I see it, the CPU is a black box. I connect wires to it and give it power and turn things on and off, and observe it turning things on and off, all by protocol, and it doesn't need anything else.
I route all pins to appropriate I/O on the FPGA, or Vcc, and then I need to have simulated ROM at the boot address, which simulates BIOS. And I just read the Am386 was a CMOS 3.3V part, so that removes level shifters.
Since I am the motherboard, all my BIOS would need to do is setup interrupt vectors for CPU-issued interrupts (0x0 through 0x1f), and run some software that does something I have control over.
First thing I need to do is get help on board design and components. I'm thinking a socket (Package: PGA-132) with pins routed to the mated 40-pin breakouts I would assign on my FPGA. Of the 160 pins, only so many are GPIO, so I would have that limitation on design.
I think I could do all that, but there are things I don't know. Will I need capacitors? Resistors? Some kind of something to handle electrical oddities? If not, then I assume making trace lines equal is important, but not greatly at only 40 MHz.
On the FPGA, it would route address and data pins to logic identifying memory and I/O, and read / write, responding appropriately, routing certain memory to emulated ROM, the rest to on-FPGA SRAM emulating DRAM.
It seems a simple physical design. Moderately complex logically. And very exciting. :-)
--
Rick C. Hodgin
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Rick C. Hodgin
Everything is a black box in that sense. The "protocol" is the part you need to understand in detail.
I can't find anything that says it was 3.3 volt. Where did you read this?
Yes, if you don't plan to run it as a PC, but have you figured out any of this?
Board design is not as hard at 40 MHz as at 100's of MHz, but you still need to know something about signal integrity. If not sometimes the voltages will bounce and jitter and so look like the wrong voltage when sampled and clocks can bounce and double clock on a single edge. This is *very* important stuff to know.
If you are asking questions at this level, you will not be able to design a board that will work. You need to learn basic electronics. What do you know about electronics?
I think you don't know enough to understand the problems involved in what you are trying to do. For one, trying to ship signal lines through two connectors, three boards and many inches of signal trace could result in severe signal integrity problems. This is stuff I have to pay attention to on one board with no connectors and fairly short signal traces.
--
Rick C 

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Reply to
rickman
Wikipedia:
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"The AMD Am386SX and Am386DX were almost exact clones of the 80386SX and 80386DX. Legal disputes caused production delays for several years, but AMD's 40 MHz part eventually became very popular with computer enthusiasts as a low-cost and low-power alternative to the 25 MHz 486SX. The power draw was further reduced in the "notebook models" (Am386 DXL/SXL/DXLV/ SXLV), which could operate with 3.3 V and were implemented in fully static CMOS circuitry."
I do not find the same reference here or here:
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But I do find this:
AMD Am386DE-25KC 25 MHz 3-5 V 0.32-1.05 Watt 132-pin PQFP
So it might be this 25 MHz DE part.
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Rick C. Hodgin
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Rick C. Hodgin
Other references:
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The PDF refers to an AMD document number #17028 for their 3V Am386.
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Rick C. Hodgin
Reply to
Rick C. Hodgin
any of that in verilog?
Reply to
lasselangwadtchristensen
Yes. Using Lattice's Diamond software on a Lattice XP2 Brevia board:
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I've also worked on an Altera board, which is what I'd be using for this project:
Cyclone V GX Starter Kit
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I have this breakout board HSMC to GPIO, yielding 120 pins, plus another 40 pins which are on the GX Starter Kit board:
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I wouldn't mind building a board which plugs directly in to the HSMC port so that it has no cables, fewer connections. But, those are the things I don't know about the hardware end of it. Logically, I know I need to have this high and this low, and so on, and digitally it would all work, but to transfer that digital logic to real analog hardware ... I don't have any experience on it, apart from reading many many many things about it.
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Rick C. Hodgin
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Rick C. Hodgin
Direct link for Lattice XP2 Brevia2 board:
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Rick C. Hodgin
Reply to
Rick C. Hodgin
writing verilog or copy-pasting verilog ?
anyway, 99% of such a project will be done in a simulator
Reply to
lasselangwadtchristensen
Writing Verilog. I've also written a CPU core that synthesized in Altera's Quartus II software, but I never debugged it and I have no idea if it actually works:
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That would be great. How do I do it? What tools are available for the Alter Cyclone V GX Starter Kit toolset?
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Rick C. Hodgin
Reply to
Rick C. Hodgin
what's wrong with icarus iverilog? no point in looking at specific boards or fpgas until you have it working in a simulator
Reply to
lasselangwadtchristensen
I've found the tools clunky. I want to see some kind of visualization like this:
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Which produces information on runtime like this:
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And produces some kind of output like this:
(click the "Trace More" button many times)
----- The reason I stopped working in Verilog was because I found it textual and confusing. I had intended to write my Logician tool, which would be a Blender node-like arrangement of hardware, allowing me to sample all data lines, and visualize it as with the 6502 visualization.
Blender Node Editor (at 1:18 and after):
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I haven't had time to do it yet, but there must be some tool closer to that out there. If not, that's where we should start (writing that tool for people to use).
--
Rick C. Hodgin
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Rick C. Hodgin
Now that the intrusion appears to be over, would anybody like to help me in preparation for this project?
Specifically, I'd like some help in guiding me toward the type of board and sockets I'll need. I think I know what to do, but without someone to say "yay" or "nay" I'm just guessing.
It will need a 132-pin PGA, a custom board which connects into the three parallel 40-pin adapter board I have for my FPGA. In that way, the 80386 chip will ride right above the FPGA, with traversing the main 40-pin-to-FPGA connection, and the 80386 board-to-40-pin connection.
80386 ========= ||||||||| =========================== || || ||
Reply to
Rick C. Hodgin

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