Hello,
I have an XILINX FPGA evaluation board with a JTAG pod, which connects to the parallel port. To download my VHDL code I'm using the iMPACT software. If I repeatably download code to the FPGA it starts to act in a strange way e.g. parts of it just stop working. The only way I can overcome this is to remove the power supply and then reattach it, therefore reseting it. After doing this everything works fine.
Is this a common problem with FPGA's or am I doing something wrong? Could it be a problem in my code or do I just have to keep toggling the power to the FPGA?
Thanks for any advice,