Hello,
I am writing my report on a university project. The project work involved an FPGA implementation of a neural network.
I have created two versions of the design; a serial and a parallel version. Both synthesise and work in hardware.
I am comparing the two in terms of performance. I would also like to compare them in terms of how much FPGA resources they consume. Could somebody please give me some advice on what elements of synthesis would be good for comparison?
I'm currently comparing Max Clock. Frequency, Number of Slices, Number of Bonded IOBs.
Thanks