Hi all,
In an SPI interface i have got 4 slaves and one master What i wanted to know is wether the master can assert two slave selects(SS_N) simultaneously OR is there a restriction that master can assert only one slave select.
Does SPI standard dictate anything!!!
Any comments on this would be appreciated.
Regards, Praveen
I'm assuming that you have a common transmit and receive data line for all the slaves. If you simultaneously assert multiple chip selects what do you think is going to happen to the receive data line? Don't you think that there would be contention and thus garbage?
If you want to broadcast to all slaves and have a mechanism to disable the receive data path from the slaves ... you could do that.
SPI is not a standard ... it is a Motorola protocol that has become common place in the industry and as such you will get a lot of minor differences from implementation to implementation ... much like I2C.
Mike
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