Do you have a question? Post it now! No Registration Necessary
May 30, 2005, 3:44 pm
rate this thread
- Paul Leventis (at home)
May 31, 2005, 3:13 am
Re: Nios speed down
By any chance, did you set an aggressive timing constraint? If not, then
Quartus (as of some version between 4.0 and 4.2 -- I forget which) will
automatically stop working hard on timing once it sees that your design (a)
meets timing and (b) will likely be able to route. This saves you compile
time, but also means that push-button compilation without a tight constraint
may show a slowdown.
If this is not the issue, please provide some more information, such as what
Nios options you selected and what device you are targeting.
- » Xilinx CPLD fitter trouble, OK in Foundation4.1, bad in 6.3,7.1
- — Next thread in » Field-Programmable Gate Arrays