Spartan-3e JTAG no device id

I am trying to get an xc3s250e-4tq144c to configure using JTAG.

  1. impact reads 0x00000000 as idcode This causes impact to error out during identify with a strange error about missing bsdl's
  2. JTAG works using impact debug mode. I can put it in bypass and also see the length of the instruction register. I can see data shifting in and out so I know JTAG works.
  3. Part markings are: XC3250E TQ144AGQ0601 D1392255A0
4C so it is a step 0 part.
  1. I have tried impact 8.1.3 and 9.1
  2. I get identical results with two pc boards.
  3. Same software / computer / cable setup works fine with a virtex2p design.
  4. All power supplies look good. (1.2Vint, 2.5Vaux, 3.3Vio)
  5. spartan-3e is the only part in the JTAG chain.

I have tried removing all the parts except the spartan and power to make sure nothing else was interfering with it.

I have not made any progress with my Avnet FAE and Xilinx webcase so I thought to try here.

I have run out of things to try. Does this look familiar to anyone? Any ideas to try?

Alan Nishioka snipped-for-privacy@nishioka.com

Reply to
Alan Nishioka
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prog_b is high?

Antti

Reply to
Antti

Yes. Originally it had a 10K pullup. One of the things I tried was lifting this pin so it relies on the internal pullup. Also measured high with a scope.

Alan

Reply to
Alan Nishioka

and you are not pulling init_b low either?

strange I had no issues with 250e on my self made boards

Antti

Reply to
Antti

Antti,

I even hate to bring this up, but how do we know it really is the part it is supposed to be? We have seen counterfeit parts (some odd die, packaged, and marked as Xilinx) sold to unsuspecting people by "gray market" resellers...

If it doesn't wake up, and say "I am the Xilinx FPGA you expect me to be" perhaps it isn't?

I certainly hope this is a simple case of a mis-wired pcb, and not a case of bogus components sold to an unsuspecting buyer.

Austin

Reply to
austin

Antti,

Further, we have seen where old board test continuity systems apply voltages (and currents) that my damage the newer 90nm and smaller devices.

I certainly hope no one exceeded the absolute maximum voltage stress limits, and has damaged the parts.

Austin

Reply to
austin

I bought them from Avnet, so hopefully they are not counterfeit. Xilinx thinks it is a software problem, but I am pretty sure it is a hardware problem. Again, it seems JTAG works, but the internals don't. How is this possible?

But I have run out of ideas to try.

Alan Nishioka

Reply to
Alan Nishioka

No testing was done (this is a new board bring up) The same micrel mic2204 power supplies were used successfully with a virtex2p design (spartan-3e swapped in to lower cost; slightly different vint used).

Is there a reason spartan-3e would behave differently than virtex2p?

Could this be caused by the ramp up of vint?

Alan Nishioka

Reply to
Alan Nishioka

Can you restrap the mode pins and try slave serial mode? That might give you a clue.

Reply to
Tim (one of many)

I have tried changing the mode pins (difficult because they are connected directly to V33 and gnd) to no effect. But JTAG should work regardless of the mode pin settings, right?

Thanks, Alan Nishioka

Reply to
Alan Nishioka

Alan,

No, this is not an issue of the ramp of any supplies....

I would look for something very simple, and basic, like an open, or a short.

Austin

Reply to
austin

Alan,

Mode pins have no effect on JTAG.

Austin

Reply to
austin

Alan,

formatting link

On page 184, it details the settings for Vccaux 2.5 volt powering of the JTAG. Perhaps, this being the only difference with V2 Pro, this may need to be looked into?

Also, the INIT should go low, and then once the device has cleaned out, and is ready to be configured, INIT will return high (requires a pull-up resistor).

Holding INIT low, continues the cleanout, and prevents any further operation (until it is released).

I am not sure, but it may be that as long as INIT is low, the JTAG state machine may not be operating (..?..).

Austin

Reply to
austin

Yes, JTAG works in all modes. And maybe you have the mode pins set to salve serial. Or even floating, which means that the default pullups pull them to slave serial, depending on the HSWAP pin.

What I was suggesting is that you try programming the part in slave serial mode. That could show up any one of a host of problems. If slave serial works and JTAG doesn't...

Good luck.

Reply to
Tim (one of many)

Alan,

INIT is not the signal that holds the JTAG block in reset, it is the PROG signal, or the power ON reset.

So, if the core voltage AND the Vccaux AND the IO bank which has the config pins on it are all powered ON, AND if the PROG_b is not being intentionally held low, THEN the JTAG state machine should be released, and should operate. Basically, when INIT goes high, the mode pins are sampled, and then based on the mode pins, the configuration state machine goes to whatever mode is specified, and proceeds with configuration.

If JTAG is specified by the mode pins, then the part waits to be configured through the JTAG port.

JTAG device ID can be read out prior to configuring (by any mode).

Amazing what digging through the schematics reveals.

Austin

Reply to
austin

Thank you all for your ideas. I now have a few more things to try.

Alan Nishioka

Reply to
Alan Nishioka

I tried tying PROG_B to gnd on my working virtex-2p board, and identify works fine (JTAG reads device id okay).

Is there any reason to expect spartan-3e to behave differently from virtex-2p in this respect?

I also tried using a bench power supply for vint (in case my on board supply was bad), but this made no difference.

My next thought is I fried the chip in some weird way and I will try replacing it.

Alan Nishioka

Reply to
Alan Nishioka

Alan,

Holding PROG_b low should hold the JTAG state machine in reset.

I did not check the V2P schematics, so maybe they did something different.

Austin

Reply to
austin

its another try, sure. I happen to own 3 dead FPGA boards with XC3S100E-TQ144 on them.. they are those "sample pack boards", think there is something badly wrong with power supply on that board so I managed to get all 3 boards to fry..

at least one of them was damaged in a way that FPGA was half dead, eg can configure ok, but not all LUTS work

Antti

Reply to
Antti

I have figured it out. (well part of it) I finally tried it with a Platform USB cable belonging to my Avnet FAE, and it WORKED!

I had been using a Parallel Cable III (I guess I left that out). I was certain that this would have no effect.

I still can't explain why JTAG partially works, but won't read device id. I would love for someone to confirm this or explain it.

My guess would be some sort of voltage incompatibility (But I was

*sure* changing the cable would have no effect, so how good are my guesses?)

Thank you to everyone for your suggestions. Alan Nishioka

Reply to
Alan Nishioka

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