Since Spartan 3e is a generation later and 90nm instead of 130nm, I expected it to be faster than Virtex 2p. But it is actually quite a bit slower. Here are some numbers from .twr files:
Because it was designed that way :-) Spartan is designed for cheapness (and sort-of low-power). Virtex is designed for speed and everything else is secondary.
From S-3 onwards (I believe) the designs have diverged, so S3 is not simply a cheapened V-II, unlike Spartan-II was from Virtex(I).
Cheers, Martin
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martin.j.thompson@trw.com
TRW Conekt - Consultancy in Engineering, Knowledge and Technology
http://www.trw.com/conekt
The figures you show are exactly what I would expect. Xilinc and Altera both have low cost, lower performance, families as well as high performance families. Spartan-3 is made to have a sell cost that is very cheap compared to V2-Pro. There is an architectural inheritance but new silicon mask sets for any family are customised to the purpose be it low cost or high speed.
There are also commercial reasons why you won't get very high speed at very low cost. Typically the higher cost families have been used to introduce new technology for high speed, higher margin parts, and to get the development costs back reasonably quickly. The Spartan-3 release didn't follow that scheme and the new technology (90nm) was used instead for low cost. It may be an indicator of the growth in the size of the FPGA market that Xilinx choose to start with the low cost family on the new technology and to presumably to recover their costs on larger volumes of chips than just larger margin silicon.
Compared to low cost silicon of a few years ago, and of even leading edge silcon early or pre-Virtex, Spartan-3 speed is very good and we are running designs here regularly at clock rates of between 50-150MHz. More with some effort. That kind of clock rate covers a large percentage of designs out there and offers very good value.
John Adair Enterpoint Ltd. - Home of Raggedstone1. The Cheap Spartan3 Development Board.
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