Snythesis error

You have two instances of cnt_next

THX !!

I think the line above shows how the combinatorial loop is formed, because you're making a value in a combinatorial process a function of itself. I think what you really want is:

cnt_next is never registered.

Don't use the two-process state machine description. It leads to exactly the problem you have.

-a

Is the a concurrent statement for the next-state-logic better ? But what if the "next-state logic" becomes more complex ?

can you convert that little example into a single process ? I have no idea how to do that... My book says, the state machine has to be separated into "register/flipflop","next-state logic" and "output logic"

-TK

I do it like this:

main : process(reset, clock) is

-- declarations begin -- process template if reset = '1' then init_regs; elsif rising_edge(clock) then update_regs; end if; update_ports; end process main; end architecture synth;

Details here:

--Mike Treseler

This is a good style beside the fact, that a tool i recently use (I think synopsys dc, not 100% shure) didn't accept the update_ports part of such an process. Thats why I update ports usualy outside the process.

bye Thomas

Thanks for the report. This style works with quartus, ise, mentor, verific and others. Updating ports outside the process works also but I resist adding wires when they are not logically required.

-- Mike Treseler

Why am I not surprised... Synopsys synthesis support for VHDL has never been very good.

Now they own Synplicity, so it may get better (or it may get worse, if they direct Synplicity to remove incompatibilities with DC!)

Andy