In this very case, it would be even simpler (without scope). The size of a single transaction is programmed by the host. You could simply count the number of received words (feeded into the CRC calculator).
Sebastian
So you have a clock domain crossing here. Could it be a problem of metastable flipflops? What are your constraints of the inter-domain paths? How many stages has your synchronizer logic?
Sebastian
I use two stages to synchronize the Strobe signal. I doubt its metastable issue. Cause there are 8 channels of IDE and only one channel always gives the error. It cannot be that selective :-).
One thing that points this not being metastable issue or synchronization issue is that, the frequency of CRC errors seems to be data dependent. By that I mean, the CRC errors occur more frequently when data toggles a lot of bits. Iam rigging up test to check this more thoroughly.
New observation is that new model of hard disks are more prone to CRC errors than older ones I was testing with. Probably they have stronger drivers :-). Will find out once I have scope to properly measure the rise time and ringing.
I will also try out what Peter suggested, regarding checking for double clocking. I have been hesitant to make code changes or a new place and route before understanding the issue. But now I guess I am pretty confident there is nothing wrong in the design and/or timing constraints. So will go ahead with above changes.
Once again thanks for all the help.
Brijesh
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