Hi,
Please clarify me about blocking and nonblocking statement difference in RTL design.
CODE1: always@(X or Y or Z) begin Q1 = X & Y; Q2 = Q1 & Z; end
CODE2: always@(X or Y or Z) begin Q1
RTL deisgn for Blocking and Nonblocking
Sep 07, 2006
1 Replies
himassk -
Do some Googling. This topic is well covered in many papers that are available on the web.
As you read, remember this rule of thumb: For synchronous logic, use non-blocking. For combinatorial logic, use blocking.
Also - why are you posting this Verilog specific question to the FPGA newsgroup?
John Providenza
himassk wrote:
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