Re: Virtex-II bus macro doubt

Hi,Salvatore, First,download the newest version of Xapp290,find out the nmc file for your FPGA type. You can easily distinguish them by their name. Remember,each nmc file serves for one FPGA FAMILY! As to the ucf constraints for busmacros,read xapp290 document,in appendix,there is explanation for it. That's to say,do not constraint busmacro in floorplanner or fpga-editor,instead,add syntax manually in your ucf file! Remember,take care of your signal flow direction,keep in mind the busmacro should exactly straddle the dividing line of the communicating modules(i.e.,boundary of two modules is X15 for leftside module,X16 for rightside module,then you should place your busmacro X12Yy. In this way,busmacros should occupy X12,X14,X16,X18 four columns,two columns in leftside module,two colunms in the rightside module). good luck! If not clear,welcome discuss with me by email. cheers, jeffsen