Hello everyone! Can anyone tell me or suggest a way to capture a RC servo PWM signal with a Xilinx CPLD in ABEL?. When the pulse duration is 1ms the digital value is logic 0, when is 2 ms the digital output is a logic 1.
Best Regards Thanks in advance
Form the signal into a digital value. Use an external crystal or R/C oscillator to count the width of the pulse. A count of n in 1ms is a 0, a count of 2n is a 1. If all you need is a logical result and not a variable value, this threshold is pretty easy to program.
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In building block terms, this is a monostable and a D register. In a CPLD a monostable is built as an edge-reset-counter-compare. You could consider hysteresis on the time threshold, as the 1-2ms windows are usually linear.
If it is multichannel RC, there is a frame signal to consider too.
-jg
thanks for the help john_H and Jim Granville! It's working!
Bruno
"Jim Granville" escreveu na mensagem news:W_0Hc.6873$ snipped-for-privacy@news02.tsnz.net...
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