Hi,
I am working with the PPC405 processor on a Virtex2Pro board and was wondering if it's possible to access the reservation granule where reservations for the semaphore instructions lwarx and stwcx are set?
Your help will be greatly appreciated
Robin Maleche
Hi
I am working with the PPC405 processor on a Xilinx Virtex2Pro boar
and was wondering if it's possible to access the reservation granul where reservations for the semaphore instruction lwarx an [i:a40a6a8998][b:a40a6a8998]stwcx[/b:a40a6a8998][/i:a40a6a8998] ar set
Your help will be greatly appreciate
The chapter on Semaphore Synchronization on pg. 128 and Appendix D on pg. 537ff of
lwarx and stwcx. are low-level assembly instructions always operating on a single word. They are used to implement higher-level constructs like semaphores or critical section that can then be used to atomically access larger sections of memory. Appendix D lists some examples.
- Peter
Gladiator wrote:
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