Non volatile implementation of Xc2s100

I have Spartan-II FPGA XC2S100. I wan to implement FIFO interfaced with ADC, DAC and Extended Memory Interface EMIF in Spartan-II Fpga. I can implement the required 256*18 SN74ALVC7806 FIFO by the use of built in 40K block RAM in Spartan-II FPGA. But the implementation is volatile For the non-volatile implementation what is the best most economical component (from for example flash, CPLD, EEPROM, PROM, flash prom etc, preferably one for which I don't have to use parallel port interface ) that can be used with XC2S100 or XC2S50 ?

Thanks and Regards Atif Nadeem Research Associate Al-Khawarizmi Institute of Computer Science, UET Lahore, Pakistan

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Peter Alfke

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