Newbie question -fanout of iopins in fpga

Jun 26, 2004 2 Replies

what is the fanout of the IOpins in Virtex2 to devices



thanks and regards vivek


The details are in the data sheet. It depends upon which IO standard you are using.

I haven't seen the term "fanout" in data sheets for a long time. It doesn't really make much sense with modern logic.

CMOS has almost 0 load current so you can drive hundreds of loads if you don't care about speed. The data sheet will give you the switching times for a specified load capacitance. If you have more capacitance it takes longer.

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Though, you have to care for input rise and fall time requirements of the attached receivers.

Regards, Mario

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