Hi
i just realized that a DIP40 module on my desk at work could be the most expensive 8051 compatible DIP40 thing ever made - its a Virtex-4 V4LX25 based FPGA module with current manufacturer price (qty 1) of 607 USD.
This expensive 51 was developed as support request to help our customers to use Nexxar to build FPGA applications - the design is based completly on open-source T51 IP Core from Daniel Wallner (jesus@opencores ) as that design does not work directly for V-4 I made the small changes (only change of BRAMs prims) and after copying the .BIT to mini-SD card, I got:
HydraXC BIOS 1.0.2.a MAC: 15E087309014 Status: File: BASIC52 .BIT Loading FPGA Loading O/S...
*MCS-51(tm) BASIC V1.1* READYREADY
Hello Virtex-4 MCS-51 Basic
--------------------------
READY
------------ the above is actual screenshot from terminal, at the place where the MCS-51 prompt appears I pressed ' ' (space) to invoke the auto-baud detection.
funny, after doing it I remembered that I have done some MCS basic work earlier, porting it to 89S8252 to use internal flash.
The Virtex-4 version just has the ROM Basic and 32KB XRAM
the demo design should work on any decent Virtex board all 'porting' needed would be changing the UCF
NET CLK LOC = W10; # 12MHz NET RXD LOC = D6; NET TXD LOC = E7; NET RST LOC = W3;
all the porting was rather simple, but as I am not aware of any 'ready to run' versions of the T51 IP core, the all project may be interesting to get started with the T51 IP core in FPGA
the archive contains the full ISE project - no extra tools needed - just change UCF and FPGA part, resynth and should work :)
Antti Lukats