Stratix II vs. Virtex 4 - power

Responding to comments on 90-nm power . . .

Claims here are challenging to understand. It appears that Xilinx suggest power goes down by 50% at the same time performance doubles, due mainly to a triple oxide process (benefit to leakage power) and embedding hard IP (benefit to dynamic power). Let's take a look at these claims.

Leakage and triple oxide: Xilinx claims triple oxide is used in CRAM to reduce leakage current by 50%. In Stratix II, CRAM accounts for 5% of total leakage. Does this imply CRAM leakage in Virtex devices had been 50% of the chip's total leakage? Current collateral also glosses over the tradeoffs of triple oxide, which the rest of the industry (including the likes of Intel, TI, IBM, etc.) have analyzed and have deemed too risky and too costly at 90nm for the small benefit provided. Triple oxide adds die size (larger transistors). It also requires ~4 more wafer processing steps. Both of these aspects increase the wafer cost. Both of these factors also reduce yield. Because there are now not two, but three different oxides it takes longer to tighten up the process and thus deliver sustainable, regular yields (i.e. guaranteed delivery). Finally, rapid yield enhancement requires driving wafer volume, but the limited use of triple oxide at either UMC or some other potential foundry highlights that Virtex 4 may be stuck driving the triple oxide yield enhancement alone.

Dynamic power and the benefits of embedding more hard IP: Xilinx suggests dynamic power goes down by a factor of 7x by embedding hard IP. The Virtex 4 documentation suggests the new multipliers run up to

500 MHz and consume only 57 uW/MHz. In the SX55 device (with 512 multipliers), that is 15 W of dynamic power just for DSP. Dynamic power for the core, RAMs, and I/O, and then leakage are on top of this. I'll assume the 7x factor likely doesn't apply here. Low-k helps reduce dynamic power by about 10% and gives a boost to performance of ~ 10% (part of Altera's power reduction arsenal). It doesn't look like Virtex 4 will get this low-K benefit.

There are other process techniques besides triple oxide to reduce leakage power. For instance, Altera implements different Vt's using different implants to reduce leakage power. This is how we get a low leakage CRAM. It is safer than triple-oxide, and yields leakage power reductions that are quite similar. We also judiciously apply non-minimum length transistors. Configuration RAM is a solved problem since there is no performance requirement, we can use both these techniques to greatly reduce sub-threshold leakage.

The Stratix II ALM is power-friendly. (1) It reduces the number of logic levels, so we can use lower leakage routing transistors and maintain speed. (2) It reduces the amount of routing needed by absorbing more logic into the larger logic functions, so we replace the still-somewhat-leaky routing transistors with low-leakage CRAM cells.

My assessment is that Virtex 4 is primarily trying to get power reductions through process techniques, while most of the semiconductor industry has concluded this is not sufficient -- you also need to get gains at the architecture level.

Dave Greenfield Sr. Director of Product Marketing ? High Density FPGAs Altera Corporation

Reply to
Dave Greenfield
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Dave,

V4 works, we have data, and we have parts.

No risk.

Yields are already excellent.

Notice the million 90 nm S3 sold announcement today?

Sounds like you folks are still driving wafers to get yield? Too bad.

As for "judicious use of low Vt": come on, who are you trying to fool?

Everyone has done that since .35 micron technology node. It doesn't work anymore. Look at your own leakage data. Why folks are just plain angry and upset when they see those leakage numbers (not to mention the surge).

Makes it hard for us, as we actually have to show them our working parts on boards and the presentation on triple oxide before they believe us. After all, Intel, TI, IBM are all making chips that boil water as well....

Intel with its chips that fry systems is just one example of a total failure to address power (because they can not). Why did they (Intel, TI, IBM) not use triple oxide? Because they need every one of their transistors to be the fastest possible, so they can not take advantage of it. ASIC design is a different animal. They can not derive any benefit from triple oxide. That is why they do not use it. You knew that.

You, and we, do not need every transistor to be as fast as possible. For example, the configuration memory need not be fast. In fact, making the config memory with 130 nm transistors in V4 makes it more immune to single event upsets AND gives us low leakage! How is that for a direct user benefit? (that you do not offer)

No comparison, no contest.

If all you have is FUD, you'd better go back and find something else to talk about on this board.

Aust> Responding to comments on 90-nm power . . .

Reply to
Austin Lesea

Further,

We used:

- low Vt transistors

- architectural improvements

- design improvements

- three oxides

Why? Because we have to in order to meet our customer's needs.

So do not compare us with a "gas guzzler" using old technology, old design, and old architectures.

No comparison, no contest.

Aust> Dave,

Reply to
Austin Lesea

Thanks for the dissertation. I'm afraid I miss your point, though.

You've done a great job analyzing the tradeoffs from your view. As engineers, I'm sure we can all appreciate that different tradeoffs are "better" to different people from direct experience, knowledge, and expectations (such as the troubles the industry had bringing up the low-K dielectric).

If parts from any manufacturer run hotter and cost more, the market will gravitate away from those devices. If there are cool, fast, cheap, feature-rich devices, we won't give a Vt whether there are extra process steps or yield issues that could have produced a "better" part if another approach were taken.

Particularly troublesome to me is the conclusion that brand-X apparently has their head up their triple oxide because non-FPGA vendors are implementing their application-specific hardware on other processes. I don't SEE the connection.

I love to see input from all vendors, but I see more competitor negatives than company positives here. Lets find out how good our new parts are, not how bad their chips are. Maybe we're temporarily stuck in the political mindset here in the US.

Reply to
John_H

Yesterday, Altera rolled out its Sr. Marketing Attack Dog to poison this newsgroup with his marketing messages.

That is something Austin, Steve and I have successfully fought off for many years. Xilinx also has its Marketing Rottweilers, but we managed o convince them that this newsgroup (and Xilinx) is better off without their marketing messages. We have been fairly successful in keeping this newsgroup technical and helpful. (Well, Austin sometimes stepped over the line, but he is forgiven sunce he is so technically astute, and otherwise so helpful.)

You readers have to decide: If you welcome this style of marketing in this newsgroup, then count me out, and I hang my shingle elsewhere. I will not share space with such marketing filth, and I will not stoop so low to write a rebuttal. Until Nov 2, this country has already one kind of poison warfare too many, we do not need another one in this ng.

For many years, I have teased Altera about their absence from this ng, and later I have welcomed Paul Laventis for his positive contributions. But I will have nothing in common with Dave Greenfield.

Peter Alfke, Xilinx Applications

>
Reply to
Peter Alfke

The sad thing is that it may not be "Altera" that rolled out this extreme annoyance. It may have been the one man.

I want to keep this newsgroup technical and keep seeing the contributions from folks like you, Peter, your compatriot Austin, and your competitor Paul.

Thanks for sticking with us.

many

convince

marketing

technical

write

warfare

Reply to
John_H

I had to actually go read one of his messages to know how to answer this. Being an unmoderated newsgroup, one has to be selective in what to read. I always specifically read your posts, but many others I skim, maybe reading a few words.

I do hope you will stay, and that Altera will learn the right and wrong way to make customers. I do believe that many of the detail given are better stated on a web site, possibly referenced in the newsgroup.

All newsgroups have a fair amount of noise, and just like in analog circuits it is something one learns to live with. Some other groups are much worse in noise, though maybe not in propaganda.

Thanks for all the good advice over the years,

-- glen

Reply to
glen herrmannsfeldt

Get rid of the spammer! Pls leave this ng to the technician and his daily issues. If Altera has to emphasise how bad the competition is, is perhaps one way to disguise their own shortcomings. And that will be the last comment to this discussion.

Luc

Reply to
Luc

Figure out how to get rid of spammers, and the whole world will love you. I get hundreds of spam e-mails a day, mostly real junk although one today wants to sell me a Virtex 4 kit.

In this case we know where he works, and probably where he lives, so we could do something about it. (Legal, that is.)

-- glen

Reply to
glen herrmannsfeldt

Reply to
Symon

I was trying to defend myself against a claim that could be interpreted as condoning spam. I was not trying to do that.

I suppose it might have been nice if he said who he was at the top, but we all know by now. The ones I read I found fairly factual, though maybe a little excessive. Better than I have seen from many marketing people, though.

Oh, the comment at the end? It wasn't legal redress I was asking for, but disavowing illegal methods.

-- glen

Reply to
glen herrmannsfeldt

Mr Greenfield was not an anonymous spammer, he posted properly under his Altera address, and he was on-topic. Very much so, too much ! He just made a bunch of unsubstantiated, opinionated, inflammatory and wrong statements, and he violated the spirit and the unwritten rules of this newsgroup. And I hope he and his ilk will never do that again. Peter Alfke

Reply to
Peter Alfke

Reply to
Symon

wrong

Let's not forget that Austin got things going with the following:

Mr Greenfield certainly escalated things, but with Austin's "Bring 'em on" invitation, it's not surprising.

Reply to
Pete Fraser

But you have to admit that it is FUN to taunt the VP Senior Marketing Attack Poodle who somehow thinks that static RAM offers significant security advantages over an SRAM-based approach for storing bitfile encryption keys.

--
Nicholas C. Weaver.  to reply email to "nweaver" at the domain
icsi.berkeley.edu
Reply to
Nicholas Weaver

Hi Austin,

I look at this data fairly frequently, and am not angry or upset. As the process has matured and our process control has tightened, we have seen a significant improvement in worst-case leakage; the latest numbers are really quite good. And while leakage has become a non-trivial contributor to overall power at 90 nm, dynamic power still dominates for most designs. Since I have no data on Virtex-4, I have nothing to compare our power (dynamic or static) with. We've achieved farily significant reductions in I/O and core dynamic power in Stratix II vs. Stratix (which was no power hog either), due partly to architectural and circuit changes, and of course partly due to Vcc reductions, process shrink and low-k dielectric (sadly, not available on V-4). So I can't wait to see how V-4 compares (or if there is "no comparison").

Once you've used non-minimum gate length (for example, 130 nm on a 90 nm process) and higher Vt, why bother beating on the leakage of configuration memory further? Everyone knows that sub-threshold leakage is exponentially related to these two knobs, and since (as you point out) configuration RAMs can be made dog-slow, there's no penalty to extensively using these two techniques on those circuits. Config RAM makes up less than 5% of our leakage power. So I do not find your triple-gate oxide message particularly compelling -- where's the 50% leakage reduction coming from? Compared to what?

Does 130 nm give you better SEU protection? You have previously argued that smaller transistors improve SEU; if I recall correctly the reasoning was that the smaller cross-section helps more than the lower cap, or something like that (I am no SEU expert). In one of your posts, you write "Oh, and yes, the 90nm technology is now 30% better than the 150 nm technology (15% better than the 130 nm technology) as proven by our tests (as presented to the MAPLD conference last month)."

An overly strong statement you've made a few times. I think the jury is still out on V-4 vs. Stratix II, since the former was only just announced (well, not counting the previous two announcements...). If in a few years, after the market's finished its analysis, you turn out to be right, I'll buy you a beer next time I'm in San Jose. I think my pocket change is safe.

I for one can't wait until we can start throwing around some data. It stinks less than the current projectile material. While we will still be accusing each other of cooking the numbers, at least there will be numbers.

Regards,

Paul Leventis Altera Corp.

Reply to
Paul Leventis (at home)

I don't feel this is true. Some of the questions I have posed about Altera and their devices I have gotten response from individials from Altera. Their responses have 'right on the ball' and very helpful.

Now if they only offered a NIOS II Development Kit with EP2S60...

Derek Simmons

Reply to
Derek Simmons

I don't feel this is true. Some of the questions I have posed about Altera and their devices I have gotten response from individials from Altera. Their responses have 'right on the ball' and very helpful.

Now if they only offered a NIOS II Development Kit with EP2S60...

Derek Simmons

Reply to
Derek Simmons

Just so! There is more marketing jive going on here than just from Altera. Being new to this group, I thought this was a Xilinx only area until the "infamous posts" showed up.

I look forward to the technical threads, but the hype from anyone (including Austin) I skip over.

One more poster to add to the "skip-over-list".

. .

Reply to
Chris Alexander

Much of Austin's stuff is worth reading. Occasionally though, he goes into over-the-top marketing mode.

Pete

Reply to
Pete Fraser

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