Manual LUT - AND function mapping problem

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Pasacco 19 years ago

Dear all

I am trying to manually map "2-bit AND" function into single slice, with no luck -:

I type the commands below in the FPGA editor.

Problem is that,

"F" port of slice is NOT connected to "D" pin of LUT.

I wonder if following is correct.

F:\#LUT:D=A1\*A2\

If someone has experience, let us know how I should modify the command. Any document or pointer will be also grateful.

I am using ISE 8.2.03 and Virtex-4. Thank you in advance.

-------------------------------------------------------------------------------------------------------------------------- select site "SLICE_X0Y2" add setattr comp $COMP_0 Name s0 unselect -all

select site "SLICE_X2Y2" add setattr comp $COMP_1 Name s1 unselect -all

select comp "s1" setattr comp s1 F A1*A2 setattr comp s1 G A1*A2

setattr comp s1 Config COUTUSED:\#OFF\ YUSED:0\ XUSED:0\ F5USED:\#OFF\ YBMUX:\#OFF\ YINIT:\#OFF\ F:\#LUT:D=A1\*A2\ REVUSED:\#OFF\ SYNC_ATTR:\#OFF \ SRFFMUX:\#OFF\ FFY_SR_ATTR:\#OFF\ FFX:\#OFF\ FFY:\#OFF\ FFX_SR_ATTR:\#OFF\ G_ATTR: \#OFF\ DIG_MUX:\#OFF\ CY0G:\#OFF\ FXUSED:\#OFF\ DIF_MUX:\#OFF\ F_ATTR: \#OFF\ CY0F:\#OFF\ DIGUSED:\#OFF\ SHIFTOUTUSED:\#OFF\ BYOUTUSED:\#OFF\ FFX_INIT_ATTR:\#OFF\ FFY_INIT_ATTR:\#OFF\ ....

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J

John_H 19 years ago

For this level of control, I instantiate something that I can use as a template and use the getattr to attain the full string including the LUT-to-D connection, changing only what I know needs to be changed from my code-instantiated template. I haven't found documentation on all the ins and outs of changing an attribute across the many architectures and architecture elements.

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J

Jim Wu 19 years ago

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You will see the connections turned (in light blue) from the LUT inputs to the LUT if you have nets driving the inputs outside the slice. So you need to add two nets and connect them to the F1 and F2 inputs.

HTH, Jim

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Manual LUT - AND function mapping problem

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