Make file ...........Help Please

vhdl snipped-for-privacy@yahoo.co.uk (MACEI'S) wrote in message


Well, you should definitely get the makefile hand book - it
has to many options ...

But, to summarize, you probably want something like this:

VHDL=VIR3.vhd VIR3_1.vhd VIR3_2.vhd   # no commas !

$(VHDL):
    synthesis_command $@

replace "synthesis command" with the name of your synthesis tool.
The "$@" will be automatically replaced with the vhdl file names.

Regards,
rudi              
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