Is it possible for two wires to share the same FPGA pin?

Question

For example, I have two wires FA[23:1] (address line for Flash) and RAM_A_SD[63:0] (data line for SRAM), due to the number of pins constraint, FA and RAM_A_SD share the same FPGA pins (seen from outside of FPGA). I tried to assign those two wires to the same pins in pin assignment file, but got errors from Xilinx ISE mapping process, saying that it is incorrect to assign two wires to the same pin and cannot resolve the pin assignments. Just wondering whether it is possible to use both Flash and SRAM outside of FPGA in this case, or should I tri-state every single data line which shares the same pin with other wires, such that there is only one wire goes into a particular pin (seen from inside fpga)? cheers, -Wei

Dave Pollum · Accepted Answer

Wei;

FA[0] ---|3S>-----------+------ FPGA pin FA_en----^ | | RAM_A_SD---|3S>----+ RAM_A_en -----^

--|3S>-- is a tri-state buffer ^ is its enable pin

use a mux (multiplexor)

-Dave Pollum

Dave Pollum · Answer

I'll try this again:Wei;       FA[0] ---|3S>-----+------ FPGA pin       FA_en----^        |                         |      RAM_A_SD---|3S>----+      RAM_A_en -----^      --|3S>--   is a tri-state buffer                 ^ is its enable pin-Dave Pollum

mk · Answer

If I understand what you're asking, you need to time multiplex the pins internally ie as you have to have two sets of wires, one for flash, one for sram, you need to multiplex them before you drive the pins. So you have a single set of pins which goes to both flash & sram and individual chip enable pins to tell which external chip can use the wires. So internally multiplex the buses, & externally de-mux with the chip select.

Hope this helps.

Is it possible for two wires to share the same FPGA pin?

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