Initilization of block rams to create rom

I wish to create a rom for Virtex2 xilinix part. Which is better/ works using attributes INIT_00 etc in the code or puting them in the configuration file. The code will be written in vhdl. Any body seen any examples of this being done? Thanks

Reply to
Stephen Lohning
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Reply to
Philip Freidin

Many designers are including the INIT values in the HDL to support RTL simulation and to have these values visible to designers who are viewing the code.

A small correction to the article above. If you are using Synplify Pro, the 7.3.3 release now supports passing the INIT values using generics or defparams. This allows the INIT values and other component attributes to be entered only once for synthesis and simulation as a generic or defparam. It should be less error prone than remembering to change both the attribute for synthesis and the generic/defparam for simulation.

Bob

Synplicity FAE - Colorado/Utah

Reply to
Bob Efram

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