How are constants stored ?

Hello all,

I always wondered the following:

How are constants implemented in an FPGA ? How many can be stored without causing bottlenecks (routing issues)? A quick scan of a Spartan3 indicated there is no ROM.

Thx

-Roger

Reply to
Roger Bourne
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All FPGA gates are synthesized in look-up tables. A constant is synthesized with tables set for fixed output. Think of it as wires to power or ground.

Try it and see. One constant bit per LUT is maximum.

-- Mike Treseler

Reply to
Mike Treseler

and some routing resources have tie offs (to gnd or vcc) mostly on the gaskets of hard ip blocks. Aurash

Reply to
Aurelian Lazarut

Roger, It's not exactly as simple as 'storing' them... Often a constant input to some logic results in a simplifaction of the logic (e.g. 1 and x just becomes x) and this is propogated through the design by the tools, pruning off redundant logic etc. Any constant input to the base LUTs in the design can be absorbed into the LUT contents and so is never explicitly stored.

Or if you mean a lookup table of addressable constants they may be stored in LUT ram or embedded RAM etc. depending on how they are coded.

A constant input to an embedded resource such as a RAM or multiplier will be stored in slice registers (flip flops) within the device.

hth cds Roger Bourne ( snipped-for-privacy@hotmail.com) wrote: : Hello all,

: I always wondered the following:

: How are constants implemented in an FPGA ? How many can be stored : without causing bottlenecks (routing issues)? : A quick scan of a Spartan3 indicated there is no ROM.

: Thx : -Roger

Reply to
c d saunter

Actually, what I was pondering was how a set of constants that are suppose to be routed to the same operand of a multiplier (not at the same time, of course ), will be stored.

I guess, from the above, it means that the constants will stored in the same number of FFs as the number of bits of the constants.

-Roger

Reply to
Roger Bourne

: Actually, : what I was pondering was how a set of constants that are suppose to be : routed to the same operand of a multiplier (not at the same time, of : course ), will be stored.

: > A constant input to an embedded resource such as a RAM or multiplier will : > be stored in slice registers (flip flops) within the device.

: I guess, from the above, it means that the constants will stored in : the same number of FFs as the number of bits of the constants.

Roger I snarfed there - looks like they are stored in the LUTs not the FFs.

There are several options for efficient storage of multiple constants for a multiplier etc. - in a Xilinx device the LUTs may act as 16x1 ROMs or RAMs or a 16 bit shift register. So if you wanted to store say 16 8 bit constants you would only need 8 LUTs and no extra routing overhead compared to having only 1 constant (except for the addressing) It's called Distrbuted RAM in the X. devices. If you only need cyclic and not random access to the data using the shift mode simplifies things - SRL16E. Involve the slice FF as well as the LUT and get an extra element...

cds

Reply to
c d saunter

Hi Roger,

will

Actually, a constant will rarely if ever be stored in a flip-flop, because the tools will optimize away a flip-flop that never toggles and replace it with a LUT driving the same value. Since there are only two possible values for each bit, you need a minimum of two LUTs to give you "global" 1/0 signals, which can then be routed to the appropriate input(s). Your original question seemed to be: does this cause routing congestion, and if so, how can I avoid it? The answer is that the implementation tools will (read: /should/) take care of this for you, by duplicating these constant drivers appropriately

However, in your case, it sounds like you actually want a ROM to store your multiplier coefficients. What you describe seems to be a number of constant values, fed to a multiplexor that selects the appropriate constant given the state of some other signals in your design. Now say that you have four signals that determine which constant to use on the current clock cycle. For each bit of the constant operand you need a function that determines what that bit should be. This function is four-bit input, one bit output: i.e. it is a LUT. So in fact all of your constants (up to 16 of them) will fit in N LUTs, where N is the number of bits of the constant.

When the said four bits are a binary-encoded address, the LUT is effectively being used as a conventional ROM.

In general, constants are rarely "stored" in any recognizable way in an FPGA, except in ROM tables; rather, constant propagation at synthesis time causes them to be absorbed into the surrounding logical expressions (often simplifying them and reducing the area consumed by your circuit).

Cheers,

-Ben-

Reply to
Ben Jones

Actually, the LUTs of all FPGAs **ARE** ROMs! They are very SMALL ROMs, but they are a ROM until you reconfigure the FPGA differently.

Jon

Reply to
Jon Elson

Jon, this is not quite true (or at least doesn't apply to all Xilinx architectures) in virtex2/pro all LUTs can be loaded (serially in SRL mode) in later architectures some of them (SLICEM) can be used as RAM, more, some of our customers are using this feature, to reload coefficients for filters, or pixels for led displays, or to make "runtime reprogramable gates". More advanced users know that a lut used as logic, still can load bits in SRL mode, to reload the lut, and are taking advantage of this. Aurash

Reply to
Aurelian Lazarut

this.

Reply to
Simon Peacock

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