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Hit Logic

Hi,

I have a question concerning a possibility to find out whether there is a hit or not (cache).

How can I check with few ressources need (Altera Cyclone device) if there is one or more positions with '1' within a 32bit-vector (in this case a signal hit='1' should be the result)?

Thank you very much for your help.

Kind regards Andrés Vázquez G&D System Development

Reply to
Vazquez
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It should be OK simply to write the obvious VHDL or Verilog:

....

reg [31:0] hits; wire hit; assign hit = (hits != 0);

....

hit

Reply to
Jonathan Bromley

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