Hit Logic

Oct 30, 2003 1 Replies

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Vazquez 22 years ago

Hi,

I have a question concerning a possibility to find out whether there is a hit or not (cache).

How can I check with few ressources need (Altera Cyclone device) if there is one or more positions with '1' within a 32bit-vector (in this case a signal hit='1' should be the result)?

Thank you very much for your help.

Kind regards Andrés Vázquez G&D System Development

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Jonathan Bromley 22 years ago

It should be OK simply to write the obvious VHDL or Verilog:

....

reg [31:0] hits; wire hit; assign hit = (hits != 0);

....

hit

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