3 years ago
I'd like some help on setting this up to get a Pmod VGA device
to generate proper timing for VGA modes up to a 150 MHz pixel
clock (1680 x 1050).
The Pmod VGA device:
It has 4-bits each for R,G,B, and 2-bits for hsync and vsync.
The timings for VGA video modes can be found here, along with
the polarity of the hysync and vsync signals:
My primary goals are to support these modes and to get my VGA
monitor to recognize the signal:
640 x 480
800 x 600
1024 x 768
1280 x 1024
1680 x 1050
I'm content to draw alternating red, green, blue bars of about
16 pixels each, interspaced with black and white squares. Just
something to show an image.
My goal is to get two of these devices working simultaneously
on the FPGA, and to setup the ability to read RAM for the pixels.
I wouldn't even mind supporting a monochrome output for now to
be honest. I just want to be get the displays up and running
and I can add-on from there.
Would anyone like to help me with this project? I'm looking for
someone to help me with the Verilog code, and to go through the
steps in Quartus to get it to synthesize and update the FPGA. I
don't have test equipment, so if someone can use their test equip-
ment to help me in that area it would be appreciated too. I fig-
ure we can share code. I'll write what I think it should be (I
already have it written), and someone can help guide me where I
am wrong, or where the idea / design is incomplete. Plus, all of
the aspects of getting it to work with an FPGA.
The GX Starter Kit also has a built-in HDMI if someone would like
to help me with that instead.
Thank you in advance.
-- Rick C. Hodgin