gate count calculation in xilinx.

Hi, Can anybody help me in providing a document or site in gate count calculation in Xillinx Spartan 3E. thanks & regard subbu

Gate-count is a meaningless metric for FPGAs, where functionality is implemented in coarser chunks, like LUTs and BlockRAMs, DSP slices, sophisticated I/O etc. Marketing might be tempted to claim inflated numbers, which would create howling comments from the user community. Just don't dive into this rat-hole ! Count instead flip-flops = Logic Cells, and then evluate the more dedicated functions, like memories and multipliers/accumulators. Peter Alfke, Xilinx Applications