Hello,
I'd like to know if there is any documentation on the (presumably normal) form of the LUT boolean equations as used by Xilinx to describe the LUT's operation in fpga_editor and xdl files, and if there is any existing algorithm to get this normalized equation from the LUT's memory contents.
Thank you, JB
think of the LUT's memory contents are the 0 and 1 entries in a Karnaugh Map. It is straightforward to derive the corresponding logic equation from that. I used the algorithms from k-map
Markus
Hello Markus,
Thank you for the quick reply and the pointer. I also had a look at wikipedia before posting, which lists several algorithms for getting a boolean equation from a truth table. My question was more about the fact that the number of possible equations is huge, and I was under the impression that Xilinx used some kind of normal form for this, meaning that for each LUT content the equation as written in the XDL or NCD would be deterministic.
I may have completely misunderstood the problem though.
JB
Xilinx specifies the content as a hex string that reflects the LUT content as though it is a 16x1 memory. It is up to you to reduce the logic equation if that is what you want.
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