surprised output of Xilinx Virtex-4

Nov 06, 2006 7 Replies

hallo everyone,



I am here again, :)



I have download my program to my Xilinx Virtex-4 FPGA, and connect the Oscilloscope to the output. But the output seems to be strange, i have the Bild uploaded to the URL:



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Thanks for your answer, ;)



Regards, Cheng



I hope this is not insulting...

have you checked that your 'scope probe is correctly compensated? Try looking at a known good square wave, for example the oscilloscope's calibration output. Also, check that the scope's ground wire is properly connected.

Jonathan Bromley, Consultant DOULOS - Developing Design Know-how VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK jonathan.bromley@MYCOMPANY.com http://www.MYCOMPANY.com The contents of this message may contain personal views which are not the views of Doulos Ltd., unless specifically stated.

Hi Jonathan,

No, it is not insulting at all.

Auctually there is an Agilent Softtouch Probes on the FPGA Board(for Logic Analyser), i connected the oscilloscope to the end auf the Agilent Cable, and got the stranger picture.

There is another connector direct on the Board, i've just reconfigure the FPGA, so that the FPGA put the output onto this connector, and then i've got the right square wave. It is likely that, this Agilent Cable caused the Problem.

Thanks! You have right. But how come you to the point, that the problem there is?

Thanks again. Regards, Cheng

Jonathan Bromley schrieb:

^_^ ^_^

Yes, i will try it.

Regards, Cheng

MM schrieb:

Try longer cable and the picture will be even "stranger"...

/Mikhail

The LA probes have an internal RC-network (about 90K with 8.2p parallel) and require the correct input stage. So they are not usable for normal scope inputs.

I've got biten the other way. I tried to feed the signals without the probe heads in the LA and wondered about the strange bit patterns ;-)

Georg Acher, acher@in.tum.de http://www.lrr.in.tum.de/~acher "Oh no, not again !" The bowl of petunias

I have been debugging oscilloscope traces for a very, very long time :-)

-- Jonathan Bromley, Consultant

DOULOS - Developing Design Know-how VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services

Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK snipped-for-privacy@MYCOMPANY.com

formatting link

The contents of this message may contain personal views which are not the views of Doulos Ltd., unless specifically stated.

I've just readed the user's guide of the cable which i use. There is an RC-network

Thanks you all there.

Cheng

Georg Acher schrieb:

inputs.

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