Effect of reheating and reballing on reliability of Xilinx chips

Hi Ausitn & Peter and whoever else from Xilinx is listening,

I need your opinion on how number of reheating cycles with or without reballing, provided the rework is done professionally using proper equipment, will or will not affect long-time reliability. I am particularly interested in any related information with regards to the commercial grade of Virtex-4 FPGAs.

Thanks, /Mikhail

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