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dual-write port BRAM with XST/Webpack

I tested it. Leo/Xilinx can't handle the second write enable. Quartus/Stratix runs a synthesis, but does not infer dp_ram.

-- Mike Treseler

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mike_treseler
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Damn good question. I suggest you ask your synthesis vendor...

Oh, BTW, if you really want to deal with spammers, you might check up on a Maryland company that is going after them big time.

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I am in Maryland and I would love to be able to cash in on this.

--

Rick "rickman" Collins

rick.collins@XYarius.com
Ignore the reply address. To email me use the above address with the XY
removed.

Arius - A Signal Processing Solutions Company
Specializing in DSP and FPGA design      URL http://www.arius.com
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rickman

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