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doubt on configuring SPARTAN2E FPGA

hi,

I was working on configuring an Spartan2E FPGA. I used Xilinx 6.2 for developing my VHDL module. I was using the JTAG cable given with the development board. I just followed the steps given in the manual like "Generate Programming file", and used "Configure Device(IMPACT)". But it was saying the error "done did not go high". I did not understand the error, and also I don't know how to check this 'done' signal.

I would really appreciate if any one can give guidance on how to check with this error.

Thanks, Viswan

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Viswan
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Please give more info about the board / cable. Is this a Xilinx Parallel port cable?

The error indicates that the FPGA did not complete the configuration process. There is a DONE pin on the FPGA that you can probe to see if it goes high or not, there is also the INIT_L line to check. If there is a transmission error on the cable (ie, flaky connection to your board) you may be getting CRC errors in the bitstream. In that case, the FPGA should drive INIT_L low to indicate an error (as well as DONE remaining low).

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