Deriving 36MHz from a 40MHz crystal using DCM?

Hi Kelvin, This should work fine, the DCM multiplies and divides at the same time (in simplistic terms) so the spec isn't exceeded. cheers, Syms.

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RTFM, RTFM, RTFM there is somewhere a notice in datasheets that the DCM can be used in such situation where the virtual CLK is way beyound operating frequency, the DCM will still work.

So you should be safe, using the DCM with those parameters as given.

Antti

See page 54, second paragraph in XAPP462: Using Digital Clock Managers (DCMs) in Spartan-3 FPGAs.

-------------------------------- Steven K. Knapp Applications Manager, Xilinx Inc. General Products Division Spartan-3/II/IIE FPGAs

--------------------------------- Spartan-3: Make it Your ASIC

Actually, this is close to correct. Nothing is "multiplied". The 40 MHz reference clock will be divided by 10 to reach 4 MHz. The output will be divided by 9 to give 4 MHz. The two signals at 4 Mhz are compared at the phase comparator to control the oscillator. But you do have to assure that 4 MHz is within the range that the phase comparator can work.

sym>

Perhaps I should quote the passage:

" Two attributes, set at design time, control the synthesized output frequency. The CLKIN clock input is multiplied the fraction formed by CLKFX_MULTIPLY as the numerator and CLKFX_DIVIDE as the denominator. For example, to create a 155MHz output using a 75MHz CLKIN input, the Frequency Synthesizer multiplies CLKIN by the fraction 31/15. Note that it does not multiply CLKIN by 31 first, then divide by the result by 15. Multiplying CLKIN by 31 would result in a 2.325GHz output frequency-well outside the frequency range of the Spartan-3 DCM."

Hi, All:

Thank you very much for your replies. I understand it now and I will try it out.

Best Regards, Kelvin

Frequency

itself