DDR access for multiple procs on a ML310 (Virtex-II Pro)

Oct 19, 2006 1 Replies

Does anyone know if it is possible to have mutltiple processors be able to access the DDR memory in an ML310 board(Virtex-II Pro)? Currently I am experimenting with 2 PowerPC cores, but I am also looking into using a single PPC core and a single microblaze core. I'm intending to run a seperate operating system on each of the cores and would like each to have access to a fast and decent sized amount of RAM. I've seen guides using shared BRAMS for having two procs accessing the same memory for data sharing, but BRAMs are relatively small. I'm not looking to share data between the procs. Essentially, I want both processors to be able to use RAM, but have separate memory spaces within that RAM. If this is not possible, is it possible for the two procs to have access to the same memory space, but to avoid collisions by assigning each operating system a spearate portion of that memory space to use? I would assume that both processors need to be on the same bus as the memory controller, and some sort of bus arbitration mechanism would be needed. Any help that anyone can provide would be greatly appreciated.



Thanks, Steve



You can put both the processors on a single plb and use plb_ddr. If you are concerned about bandwidth, then you should look into MPMC2 design examples @

formatting link

/Siva

Join the Discussion

Have something to add? Share your thoughts — no account required.

Didn't find your answer?

Ask the community — no account required