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ARM7 vs. ARM9 (system power consumption)

We are trying to decide on whether to use ARM7 or ARM9 core in a ASIC design. One major consideration is system power consumption. From what I am told, the ARM9 consumes twice as much power as the ARM7, but most of this extra power is used by the cache. It is hard to believe that the cache controller consumes this much power, so I have to assume that the cost includes the power used by the memory accesses to the cache memory itself, and that the power figure for the ARM7 does not include the cost of accessing memory (even on chip memory).

If this is true, then the additional power cost of the ARM9 might be almost negligible in a real system.

The advantages of having a cache are potentially quite substantial in terms of simplifying our software design, since otherwise we have to carefully tailor our OS/application memory layout to run out of internal memory for the bulk of operations, while running out of external memory for setup, housekeeping, file system operations, etc. Essentially, we would have to implement a manual static "cache" using internal memory.

Does anyone out there know about these sorts of design tradeoffs on the ARM platform? Does anyone know more about how the ARM power consumption numbers are calculated?

Thanks in advance for any help!

- Andy Voelkel

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msnews.microsoft.com
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The ARM9 has a deeper pipeline than the ARM7, so there is much more logic operating per tick of the clock. There is no such thing as "on chip" memory in the ARM cores. The cache is implemented in RAM in the ASIC. You can't use the cache RAM as program space; it's there exclusively to keep the pipeline filled, and isn't directly accessible.

If you design in a 32-bit bus to external RAM, with either core you will get adequate performance. Without the cache, the ARM9 at 200 MHz would be limited by the external memory bandwidth. Most ARM7 cores top out at

90 MHz or less, so memory isn't necessarily the same bottleneck.

--Gene

Reply to
Gene S. Berkowitz

External memory has always has been the bottleneck in the ARM7's I've worked with [running at 44MHz using external 32-bit DRAM]. Enabling the cache typically resulted in a 30-50% increase in throughput. This was with the Samsung SC3C45xx family.

--
Grant Edwards                   grante             Yow!  I know how to do
                                  at               SPECIAL EFFECTS!!
                               visi.com
Reply to
Grant Edwards

The ARM7 power figure does not include the cost of accessing memory (unless you meant ARM720T which does have a cache). The ARM9 figure most likely includes a cache. A cache on ARM9 typically takes 30% of the total core+cache power, so you could adjust your figure if necessary.

As others already pointed out, an ARM9 uses a bigger pipeline, has more transistors and so burns more power. These transistors are used to both increase the efficiency (work done per Mhz) and maximum frequency. An ARM9 using a cache is typically 20% faster than an ARM7 running from perfect memory. On multi wait-state memory the difference will be much larger. So if you ran the ARM9 at a lower frequency or let it sleep when there is no work to be done, it would burn less power overall.

If a large fraction of the memory accesses are to off-chip memory, then any CPU with a cache is going to win big time, as caches typically eliminate 90+% of external accesses (which burn lots of power). Since external DRAMs are slow, you pretty much need a cache if you go above 20-30Mhz.

If you use off-chip memory mostly, yes, there is no question which wins. For on-chip memory it would depend on how much power it uses compared to the cache. Above 50Mhz a cache would still be useful, as it would become difficult to achieve zero waitstates on flash or large SRAMs.

I think they are measured when running Dhrystone on a testchip, so on ARM9 it would not include external memory access. However power numbers can vary a lot depending on who manufactures the chip, and whether it was synthesized for speed or power.

Wilco

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Wilco Dijkstra

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