custom ip using EDK


I designed a simple adder using the add/import peripheral feature in EDK. I removed the sum register in the write process, and add a my_adder process to calculate the sum. Every time I run the test (a sample software application), I get a 0 as the sum. I got both reg0 and reg1 correct, but not the sum. Anyone has an idea what I've done wrong? I can't figure if it's the code issue, or I am supposed to change some setting in EDK. Thanks.

part of my application code:


a = MY_ADDER_mReadReg(XPAR_MY_ADDER_0_BASEADDR, 0); b = MY_ADDER_mReadReg(XPAR_MY_ADDER_0_BASEADDR, 0x4); for(i=0; i slv_reg0 slv_reg1 null; end case; end if; end if;


-- implement slave model register read mux SLAVE_REG_READ_PROC : process( slv_reg_read_select, slv_reg0, slv_reg1, slv_reg2 ) is begin

case slv_reg_read_select is when "100" => slv_ip2bus_data slv_ip2bus_data slv_ip2bus_data slv_ip2bus_data '0'); end case;

end process SLAVE_REG_READ_PROC;

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I would test if address 0x8 triggers slv_reg_read_select

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The conversion from address to select is not given here...

Do these addresses actually correspond to these read selects?

You may have to simulate the design to find out.

- Brian

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Brian Drummond

Hi, Read/Write processes are generated by Xilinx EDK when I used create/import peripheral wizard. I only modified the write process, and wrote an adding function. Sorry I removed the comments when I posted the code. But here it is:

-- Bus2IP_WrCE or Memory Mapped -- Bus2IP_RdCE Register -- "1000" C_BASEADDR + 0x0 -- "0100" C_BASEADDR + 0x4 -- "0010" C_BASEADDR + 0x8 -- "0001" C_BASEADDR + 0xC


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Brian Drummond

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