Configuring Spartan 3

May 31, 2006 4 Replies

I'm having trouble configuring a Spartan 3 in parallel slave mode. The mode pins are set with M0 tied to GND and M1,M2 left pulled up internally to 2.5 volts. I verified these voltages with a meter.



I am driving PROG_B low for a few microsecs then high. The DONE and INIT_B signals go low and INIT_B goes high again. I set RDWR_B low and start clocking data in by setting CS_B low and using the WR_N signal from the DSP to clock CCLK on the trailing edge. I have looked at all of these signals with the scope and they look clean and have good timing. But no matter how much data we clock into the Spartan 3, we never see either INIT_B go low or DONE go high. DONE has a 10 kohm pullup resistor to 2.5 volts and a buffer converts this signal to 3.3 volts for the DSP.



I do see something odd on the BUSY pin. It goes high for some 800 ns. The data sheet says I don't even have to monitor this pin if I keep the CCLK rate below 50 MHz. We are clocking data into the part at less than 10 MHz.



Any idea what could be wrong?



We use this mode and it works fine.

At the risk of asking a stupid question (please don't take it the wrong way) did you remember that the confriguration data port signal names use IBM nomenclature? In other words, D0 is the most signficant bit...

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Greg Neff VP Engineering

*Microsym* Computers Inc. snipped-for-privacy@guesswhichwordgoeshere.com

No, please don't be shy. Anyone can make any sort of stupid error and this is a very likely one. Right now I don't have access to everything in this process. I designed the board, someone else wrote the software and a third party (group actually) generated the bit stream. It is entirely possible that we have multiple or no swaps of the bit order in the data between the design and the FPGA. But if that were the case, I believe we would see an error flagged by the INIT_B pin.

Greg Neff wrote:

not sure about that, if the byte is bit swapped, then the sync word will not be captured, which means the configuration process will not start, which means CRC error will not be flagged by INIT_B just ask to software guys to swap the bits and see what's going on. Aurash

Nice catch! I had not thought of that! I'll check that this afternoon.

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