Newbie alert here...
I'm trying to design a board that would allow me to configure a Cyclone device either through the JTAG port or by downloading configuration data to a serial configuration device. I'm looking at the manual and am trying to reconcile differences between figures 13-9, "In-System Programming of Serial Configuration Devices," and figure 13-19, "JTAG Configuration of a Single Cyclone FPGA."
There are subtle differences in the two diagrams that I could probably guess correctly on but would appreciate the feedback of the group.1) 13-9 shows nCE to GND through a 10K resistor. 13-19 shows nCE to GND. I assume I want to use the resistor?
2) 13-9 says Vcc pins should be connected to 3.3V supply (note 1). 13-19 has no such indication. Should I tie all VCC on these two diagrams to 3.3V, including pin 4 of the JTAG connector in 13-19? If I were looking only at13-19, how would I know that VCC was 3.3V and not VCCINT?
3) Note 3 to 13-19 says VIO is connected to nCE when it is used for Active Serial configuration with a ByteBlaster II cable. 13-19 shows nCE connected to GND... which means I just answered my first question; if I don't use the resistor and program the device with a ByteBlaster II in Active Serial mode I'll end up with a dead short between GND and VIO. Uh... right?
I guess that more than anything I just want a sanity check from the group before sending my artwork to the board shop.