ChipScope and the FPGA Editor ILA command

Hi, I've been experimenting using the FPGA Editor to modify ChipScope monitor/trigger signals and reduce the requirement to do a full P&R. The ILA command (in FPGA Editor) appears to have a bug which adds REV signals to the sampling Flip Flops. These REV signals then result in incorrect results being reported in the ChipScope Analyzer, however if the REV signals are removed (in the FPGA Editor) the correct results are reported. I've now used this approach successfully on a several Virtex

4 and Spartan 3 designs.

The issues I've had have left me suspicious of this technique, but I still remain hopeful. I was wondering if anyone else has used this approach and with what success?

Thanks, Vivian

-- Sandbyte

Reply to
Vivian Bessler
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yes, i use the method of adding signals to ILA through FPGA editor all the time ... since ISE7.1 SP4 i haven't had any problems with it ...

kind regards,

Reply to
Tim Verstraete

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