Cheap SRAM?

Hi comp.arch.fpga,

I know it's a bit off-topic but because I think that some of you might be able to help me I'll ask anyway.

I'm planning to connect some ram to a cpld for fast data acquisition. Probably using sram instead of dram should be easier because no refresh signal is needed and it might also be faster(?)

Does anybody of you have a recommendation what device I should use; it should have >= 1 MBit capacity and not be to expensive. Also, it should be possible to order very low quantities of it.

Thank you in advance, Florian

Reply to
Florian Student
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A good place to start is something like the DigiKey catalogue (because they will happily sell you one of !). Cypress, for instance make a wide range of async and sync srams - however, your choice may well be limited by the package types available. Many devices now are only available in surface mount and the high performance ones really need to be mounted on something with proper ground and power planes.

If you are thinking faster than 80MHz, then Synchronous is the way to go (or you could double buffer, or go narrow->wide in the cpld). The possibilities are endless ...

If you went to something like a spartan IIe fpga, then you could use the internal memory as part of the buffering strategy, and get a more flexible architecture than you would with the cpld !!

enjoy !


Reply to
Dave Garnett

I might suggest pseudo static ie DRAM< packaged as a SRAM with simple IO ans hidden auo refresh. I believe they are used in cell phones that means they should be very cheap & low power, but it might mean you need to order large vol. Anyway some some samples might be available. Can't remember the vendors, try Micron,Infineon,Samsung to start.

hope that helps, use google pseudo static dram or something regards


Reply to
john jakson

I was finding the old Micron Synchronous SRAM parts to be priced best around the 4Mbit size - the smaller die aren't so popular anymore. Micron sold their line to Cypress so check them out.

There are different flavors of Synchronous SRAM, the least expensive requiring a turnaround of 2 cycles on the data bus from a read to a write. The good news is that these sub-$5 parts are good for up to 200MHz operation in 100-pin TQFPs. The flavors include a single-clock result (flow-through) or a two-clock result for the best performance (pipeline).

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