Replacing SRAM with a SIMM

Hiya folks. I've got a 6502-based project going which uses sram for system memory and an eeprom for running code. A little more than half of the memory map is available for eeprom use. I have a bank-switching method implemented to take advantage of up to 128k of data from the eeprom, as well.

My eventual goal is to replace most of that eeprom space with more ram, and make the eeprom only store a basic OS, which would be able to load software from a drive or something of that sort into the extra memory, instead of having to reprogram the eeprom every time I want to run something I write.

The thing is though, roughly 32k of system memory obviously isn't very much space to work with. I'd like to be able to implement the same style of bank-switching into this extra system ram, adding maybe up to

512k-1mb of switchable storage capability, to avoid much disk activity. But the problem is sram isn't cheap, especially when you start getting into such "large" capacities.

So my thought was to take one of these countless 30-pin simms I still have laying around and see if it might be possible to use one of those instead. I know that they're dram, which requires refreshing, but I'm curious what this would entail, such as what extra hardware I might need to take care of it, and if it would impact on the normal functionality of the system to allow for the refreshing compared to the transparent workings of sram.

I've done a little bit of looking around, but I still don't know a lot about working with dram in general. Going by a pinout, I don't suppose I really need the parity bit and such, unless you're required to use it. Some simms don't even use parity from what I understand.

Anyhow, this seems like it might be the cost-effective solution, if it can be implemented without affecting how it already works very much. I'd certainly appreciate any input anyone has to offer.

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First of all, check whether the 6502 has support for DRAM (refresh controller). I simply can't remember whether it has some support for it or not.

If not, then you are up to a non trivial task, which probably is not worth to follow it - besides if this is a mass production design and you have to save on the component costs, which could justify the development effort. However in general I doubt that modern synchronous DRAMs match very well to a (slow) 6502. And getting older page mode DRAM is probably not cheap and easy either.

You get some idea on what you are up to in the following old Intel app Note regarding an i960

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You will find more information if you feed google with "DRAM controller". I don't even no whether there are still some simple DRAM controller chips around or not.

Finally, you could try to find schematics of the old Apple II or its clones. I have no clue how they did it then back, and I certainly don't know whether it is worth to get inspired by this design. But if I remember it correctly they used DRAMs for its main memory.

Hope that helps Klaus

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Klaus Bahner

DRAM refresh must be external.

Worth an exercise in logic design, but little else.

Good idea.

This project might be fun, if you have nothing better to do.

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So did most computers back then, however the Z-80 did it's own refresh. The Radio Shack Color Computer used a 6809 so that might be a place to look.

Reply to
Homer J Simpson

The Z80 has an internal 7-bit refresh register and timing for DRAM chips.

The 6502 or 6800 or 6811 or 8080 or 8051 did _not_ have any such internal logic.

The Apple I and II used its video timing as part of its refresh timing.

The 8051 did not internal refresh hardware.

However there is an old app note from Philips for adding refresh logic to the 8051.

good luck

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Sram is cheap! 512kbx8 chip is around $10.

Dont even go there.

Putting so much memory on such a tiny processor seems a waste of effort, why dont you "upgrade" to one of this centuries chips?

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Good news, there is an easy way to interface DRAM and 6502 chips. Though you wouldn't think it to look at some of the commercial designs I have seen, and listen to what most people say.

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This circuit supports 16 to 8 address line multiplexing, and 8-bit refresh address. So a pair of 64Kx4 chips will give you a full memory map.

These days it is cheap and simple to fit a 32K or 128K SRAM chip, so it is only worth using DRAM for relatively large memories.

Fortunately it is easy to extend the circuit to have more refresh address bits and multiplex more address lines. The latter can be connected to a page-select latch.

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Well kids today don't know how lucky they are. I recall paying at least $40 for 4K of static ram in the fall of 1981 to bring my OSI Superboard up to 8K of RAM.

Back then, dynamic was the only way to get larger amounts of memory in a small space and for the least amount of money, but of course it had it's faults, like the requirement for extra circuitry.

The RAM caught up with the 64K address limit of the 8bit CPUs towards (or shortly after) the time when the move to 16bit CPUs started coming into use.

As people have pointed out in the past, cache ram off older "IBM Compatible" computer motherboards is static and 8bit wide and will supply lots of RAM for nothing when you find those boards in the garbage.

I think the poster needs to rethink his plan. As you point out later, if you start loading something down with large amounts of memory, one might as well switch to a CPU that can address it directly, rather than bank switching, which was always rather lame. Bank switching back then tended to be for data, not programs, since it was problematic to plan for more code being in the right place at the right time.

He likely could consider a disk drive type solution, only using a compactflash card or the like as the drive, connecting it as I/O rather than address space, and just have a simple load in the monitor ROM.


Reply to
Michael Black

How about $800 for 16 K of DRAM in 1979?

Reply to
Homer J Simpson

True, I have plenty of them if anyone wants one.

However to be fast they were also small (32K), and low power consumption was a secondary concern.

The BBC micro had an OS call for calling routines in other banks. The OP might be able to crib from that code.

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it might be easier to figure out how to interface a SD card (for your drive) to a commodore 128 (6502 + plenty of dram)

or write a page switcher/overlay loader and stay with the small sram

Commodore put schematics in their product manuals so there's another resource you could look to also.

IIRC some 486 motherboards had SRAM cache in qauntitiies of 64K or more.

Bye. Jasen

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