Hi all,
I design CAN controller in VHDL, and I don't know how it should start working after power on. In the spec is written that CAN node can begin transmission only during bus IDLE which means after at least 3 recessive bits of intermission. But 3 recessive bits can also occur during transmission from other node, so it is possible to violate spec by my CAN controller starting transmission during these. Could someone clear this?
Mihau