When i synthesize my design in a SPARTAN3 XCS400 FPGA the synthesis report says that there are 8 blockRAMs available in Spartan3 FPGA . But after place and route and everything it says there are 16 blockRAMs available. So which one is actually correct. Does it also mean like if we used 9 blockRAMs then we are still under the limit of BLOCK RAMS or have we exceeded the design resources as the synthesis tool says.
Thanks in advance