Hallo,
I'm a bit unsatisfied with the "xst 5.2"-design flow for xilinx.
For example, when targeting for SpartanII, "map" isn't able to implement the ROM64x1 primitive, although the device has F5mux and F6mux, so one could code a ROM64X1 äquivalent macro by hand. A more important example is the SRL16 and RAM16X1S primitives. Again, it's "map" reporting, that SRL16 + RAM16X1S aren't supported on F-LUT of a slice on SpartanII, although the SpartanII Data Sheet unmistakeable states: | In addition to operating as a function generator, each LUT can | provide a 16 x 1-bit synchronous RAM. [...] | The Spartan-II LUT can also provide a 16-bit shift register | that is ideal for capturing high-speed or burst-mode data.
I plan to design using mostly self-made tools, and upto now, my plan was to feed completly mapped (but only relativly placed and only partially routed) CLB-lists through HDL into the xst-flow.
Any suggestions on alternative ways to do this?
Furthermore, I'm still searching for exact documentation (hopefully in machine-readable form) of xilinx-device resources. What about these ".spd",".nph",".pkg",".dll",".acd",".usg",".bsd",".lib"-files?
Gruss
Jan Bruns