I tried to implement a low pass filter and decimtion using Quatus 4.0 and FIR compiler 3.1.0
Parameterize - FIR Compiler Megacore Function
Coefficient Specification - (low pass set [1]) Coefficients Scaling: Auto Bit Width: 12
Arichitecture specification: Device family: Stratix Structure: Distributed Arithmetic: fully serial filter Pipeline level: 1 Data storage: Logic cells Coefficients Storage: Logic cells
Rate Specification: Decimation Factor 10
Input specifcation: Number of input channel 1 Input number system: signed binary Input bit width: 12
Output specification: full resolution bit width is 24 Based on method: Acual Coefficients output number system : full resolution
Coefficients generator dialog
Floating coefficient set Rate specification Decimation factor 10 filter type: low pass window type: Hamming coeffients: 37 Sample rate: 2.0E7 cutoff freq.1: 1.0e6
After Analysis and synthesis in Quatus 4.0, I got two warninngs
Warning: Reduced register fir:inst|fir_st:fir_st_inst|sadd:Uaddl_0_n_2_n|res[14]~reg0 with stuck data_in port to stuck value GND
Warning: Reduced register fir:inst|fir_st:fir_st_inst|sadd:Uaddl_0_n_1_n|res[14]~reg0 with stuck data_in port to stuck value GND
After simulation in Quatus 4.0, no filter output.
Can anyone help?