Z85C30 D/C (Data/Control) pin

The D/C pin is written "D//C" in the datasheet I have here, i.e. "D if

Treat this as an address input, along with the "A//B" input (which selects channel A if 1, or B if 0).

D//C needs to be a logic 1 to access the data registers, or a logic 0 to access the control registers.

In effect, the SCC occupies four bytes of address space. Assuming D//C is mapped to address bit 0 and A//B to address bit 1, the four locations are (relative to the base address):

When you access one of the control register locations, you are initially addressing WR0 (write) or RR0 (read). The other read/write control registers are addressed by first writing the register number to WR0, then reading or writing the same location to access the desired control register.

The data register can also be accessed through the control register location by addressing WR8/RD8, but this is less efficient as it requires writing the register number (8) to WR0, then reading or writing the same location, i.e. twice as many accesses compared to using the separate address for the data register.

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Thanks David. This helps a lot. Trang Mai

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