hi
IO has been the thoughts of late. As all IO is from or to 1K x 16 bit words memory mapped buffers certain limits are placed on the devices
My current plans are PAL 1024 character display using 1 buffer, but would need a character ROM, or character bit map page. ascII 256 could be fitted into 1K x 16 bits as an 8 by 8 font, allowing five of the extra 16 bits in the character index to select a buffer page then 3 bits are left for character representing modifications i.e. eight colours.
A UART working at MIDI data rate for musical applications, along with translation software to provide an instrument control buffer i.e. easy variables for control wheel signals automatically modified by data stream.
A DAC 8 times oversampling delta sigma converter.again for musical applications which does 1K x16 bit buffer DMA output.
A minimal extra parts needed ADC based on the DAC with fixed size buffer DMA.
A bit reversal load store memory cell for FFT indexing. which may be extended to do auto FFT and programable hardware biquad chains.
A USB controller/ slave mode too.
A display and keypad scan multiplex controller.
A data compression codec.
what else would people require in terms of modular cores?
cheers.