Hi
Xilinx answer record 21127 and related information, - I am still a little unsure if I did understood it all correctly and what the actual impact of the NBTI issues actually are.
I have had some trouble with DCM lately, so I am little bit more worried, AR21127 says that if the V4 is powered but not configured the DCM performance will start to degrade (there are actuall changes of the silicon!), but this process is reversable, like self healing so if the V4 is later powered and configured for the same amount of time then DCM performance will slowly be restored to be inside the specification again. We have a design were we really can not guarantee that the V4 is configured withing 10 minutes from power on, as the bitstream is on removeable media and the media may not be inserted or may not contain a valid bitstream. I also have 2 LX25 based boards and both have been poered and not configured for some time, I wonder if I should start healing the boards or maybe the DCMs have not been damaged at all.
So a direct question:
The DCM performance degration when powered and not configured, is it damging the silicon or not? And if it is, is it fully self healing (unlimited number of times, unlimited time of being powered and not configured) or is there some limit how many times the V4 can self heal itself?
or maybe somebody has a better explanation how to understand this issue.
Also little more worring is the fact that AR21127 promises the 'workaround' macros for V4 for the case of low DCM input frequency to be available in mid June, but they are still not available, its now 28 june in Europe I guess its past 'mid-June' on the US westcoast as well.
Is there anyone around who could clarify the issue once and for all? Austin, can you comment please?
Antti