Question to all area-aware designers out there

Ernest,

I would put the dirty bit along with the data.

As for area, this doesn't make sense: discrete regsiters would be bigger. Power consumption or speed might be valid reasons, depending on your technology and speed requirements. Another point might be that getting DP RAM from your vendor costs a lot more. However, in order to do cache, one would expect some kind of CAM. That would be even more costly. Also, when there are multiple bus master, you won't be able to live without DP RAM, unless you can live with a halved bus speed. When using DP RAM, remember not to read and write the same location at once: this might even destroy the next acccessed word!

Regards, Alvin.

why don't you try it? compare size of DP RAM with SP RAM and registers.

have you consideret two RAMs one for for cache line another for dirty bits,

can you split it in two, odd and even and put it in two RAMs?

do you need two read/write ports, or just a read port and a write port?

-Lasse

Of course. You only use registers for the dirty bits, ie. only 1-2 bits per cache line. Assuming around 30 bits in the tags, using registers for the dirty bits is cheaper than using DPRAM as long as registers are less than 20 times as large per bit.

Wilco