Ethernet questions

Oct 15, 2013 7 Replies
A

Hello folks.



I have been trying to implement a 10BASE-T Ethernet interface and in so doing, I have parsed the relevant portions of IEEE 802.3. While the standard does a marvelous job explaining the intricacies of the abstract interfaces between the, IMHO, overly-redundant sublayers, I was left with a bunch of questions and I thought this would be a good place to ask them.



First, what *EXACTLY* is the waveform of the signal? I got into Ethernet partially because I was convinced it used square waveforms which was great becase I though, since my FPGA uses sqare waves anyway, I could just cheat my way through encoding and decoding. But then I saw Figure



14-10 and got a mild heart attack. Because that there on that figure (if I'm reading it correctly) can be best described as "sinusoid", NOT "square". My confusion only got bigger when I saw (and thought about) Figures 14-11 and 14-13 because those wave outlines are square, through- and-through.

Now, thankfully, I can still use a MOSFET-based physical receiver with the sine wave but if I need to produce a sinusoid on the transmitter output, that's going to be a bit trickier.



This may be a good time to mention that I'm doing this on my own, outside of any corporation/company and don't have access to waveform visualization equipment. Otherwise, I would have just taken my NIC and measured.



Second, why are maximum voltages for TP_IDL and link test pulse 3.1V when the peak voltage of signals is 2.5+-0.3V ?



And third, is it possible (to anyones knowledge) to implement autonegotiation but not step into any patents along the way? Since 10BASE- T is 22-23 years old, I suppose that all aplicable patents have expired, but I saw a couple of patents regarding autonegotiation that still have a few years in them. FWIW, I won't be making network equipment, just an interface on an otherwise non-networked device and don't expect to have big volumes.


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R

10Mb Ethernet is a Manchester encoded square wave, although for 10baseT you have to keep the rises and falls rates under control to keep the harmonics under control (which usually happens in the analog bits). By the time it gets to the end of a maximum length cable it'll be pretty rounded.

Which document were you looking at? If you're referring to the voltage template, that's just what your signal should look like after being the sharp rises and falls smoothed off.

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A

I'm looking at IEEE Std 802.3-2012. Yes, I was referring to the voltage template.

I originally didn't consider harmonics at all, but by now I realised I need to keep them in mind as well. Which categorically removes sending raw square waves down the line. I suppose I'll just pass them through some sort of a waveforming circuit or something similar since I think I can not control the rise/fall times from the FPGA. But I could be wrong.

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R

If you limit yourself to 10baseT, a fairly simple RL filter should do the trick, but don't over-do it, the transformers add more than a bit of inductance themselves.

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T

You need to understand the attenuation of a cable as a function of frequency, i.e. "S21" as a function of frequency.

Also think about the harmonics in the edges of a "square" wave.

All the world is analogue, although some analogue functions do contain cliffs :)

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M

Here's a link that might be helpful (although it looks as if the project never quite got finished.)

Why don't you just use a ready made PHY chip ?

Michael Kellett

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A

Umm.. I can't see the link. Maybe the Internet ghouls ate it? Could you post the name of the project, I can also find it that way.

When I set out on this project, I made a deliberate and very conscious decision to make as many of the component parts by myself. The main reason for this is independance. If I only rely on a bunch of standard and easily replacable parts plus one or two FPGA-s which are themselves also replacabe (because their only purpose is to implement the logic which I mostly wrote in a portable way), then there is little likelyhood of someone or something choking me; for example like the LCD TV makers got themselves choked by the glass panel makers. And also, the margin is larger. :)

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G

Like 10/100 PHYs?

They've all got standard MII or RMII interfaces, and if you don't want to do anything too fancy, then they're all pretty much identical. The pinouts don't match exactly from one vendor to the next, but it's the same set of pins with the same signals on them.

Grant Edwards grant.b.edwards Yow! Where's SANDY DUNCAN? at gmail.com
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