Enable/Disable cache on MIPS

Hi, I am working on a MIPS 4KSd core, and I'm having trouble understanding what operation code to use for the cache instruction. I read somewhere that 'Hit type' is generally used for running cache maintainence, and 'Index Type' is used for initialization. Does invalidate, flush, enable/disable and lock come under maintainence? I am trying to enable/disable instruction and data cache, and I don't see what op code I need to use. For example in ARM, we can just do it in a read-modify-write sequence. Eg. To disable I cache MRC p15,0,r0,c1,c0,0 ; read CP15 register 1 into r0 BIC r0,r0,#(0x1